The present invention relates to a unique word detecting system for detecting a unique word used in a digital communication system.
Conventionally, unique words have been widely used for the establishment and maintenance of the synchronization, received phase ambiguity removal, signal type recognition, and the like in digital communication systems. A variety of modulation and demodulation systems such as phase modulation, frequency modulation, amplitude modulation, and the like, have been used.
A unique word detector used in the conventional digital communication system is shown in FIG. 4. In FIG. 4, a reference numeral 1 designates a shift register, 2 is a digital correlator including a unique word pattern memory 21 for storing a predetermined unique word pattern, N number of exclusive OR circuits 22.sub.a -22.sub.n and (N-1) number of adders 23.sub.a -23.sub.n-1, and 6 is a threshold judgment circuit, all of which constitute the unique word detector 10. The length of the shift register 1 is equal to a unique word length. The operation of the unique word detector 10 shown in FIG. 4 will be described below. Baseband data is input to the shift register 1. The shift register 1 is input with a new piece of data at every clock time and shifts the old data to the right by one bit. As a result, the oldest data is deleted. The whole data in the shift register 1 is input to the digital correlator 2 in parallel at every clock time, compared with the unique word pattern in the unique word pattern memory 21 at every bit by the exclusive OR circuits 22.sub.a -22.sub.n, and a correlation value R is calculated by the adders 23.sub.a -23.sub.n-1.
When the data in the shift register 1 are a.sub.0, a.sub.1, a.sub.2, . . . , a.sub.N-1 and the unique word patterns are u.sub.0, u.sub.1, u.sub.2, u.sub.3, . . . , u.sub.n-1, the correlation value R is defined by ##EQU1## where a.sub.i and u.sub.i (i=0, 1, 2, . . . , N-1) take the values of 0 or 1, and a symbol .sym. means an exclusive OR, which takes the value of 0 when a.sub.i and u.sub.i coincide with each other and takes the value of 1 when they do not coincide. That is, the correlation value R is equal to the number of the bits at which the data in the shift register 1 disagree with the unique word pattern.
Such a correlation value is normally called Hamming distance.
Another definition of the correlation value is a difference between the number of the bits at which the data in the shift register 1 agree with the unique word pattern and that of the bits at which the data in the shift register 1 do not agree with the unique word pattern. By this definition, the correlation value takes positive or negative values. A description will be made by using the correlation value of the latter definition. A difference between the two definitions is not essential and has no concern with unique word detecting characteristics.
The unique word is detected through the threshold determination of a correlation value produced at every clock time. In the system adopting the demodulation system wherein the phase ambiguity is generated, the received phase in the demodulator is determined at the same time as the detection of the unique word. Accordingly, a case wherein the received phase is determined at the same time as the detection of the unique word is exemplified and the description will be made below on this case.
FIG. 5 shows an example of the correlation value output obtained when the conventional unique word detector 10 is used. The correlation value R exceeds a threshold level 1 at time t.sub.0 and it is determined that the unique word is detected at this time t.sub.0. Further, the received phase is determined by observing whether the correlation value R exceeds the positive threshold level 1 or the negative threshold level 2.
In a multiphase or multilevel modulation system such as a multiphase modulation system (for example, a quadrature phase shift keyed system) or a multilevel QAM (Quadrature Amplitude Modulation) system, information transmitted by one transmission symbol is more than two bits. In such a system, the unique word detection is often performed by a plurality of the shift registers 1 and the digital correlators 2 shown in FIG. 4. At this case, a plurality of information bits demodulated from the single transmission symbol are input to a plurality of the shift registers 1 in parallel and a plurality of the correlation values R are calculated at every clock. The unique word is detected by threshold-judging a plurality of the correlation values obtained by further conducting a linear operation on a plurality of the correlation values R.
There exist, however, the following problems in the above-described conventional constitutions:
The unique word detector 10 is required to complete a series of processing up to a threshold determination within one clock time duration including comparison of the data in the shift register 1 and the unique word pattern with each other at every bit to obtain the correlation value R. That is, the unique word detector 10 must process N number of exclusive OR operations, (N-1) number of additions and one threshold determination within one clock time duration. Therefore, the unique word detector 10 is required to operate at an extremely high speed as compared with other parts of a digital communication apparatus.
When the multiphase or multilevel modulation system is employed, the entire processing, including the linear operation of a plurality of the correlation values, must be executed within one clock time duration. Accordingly, the circuitry of the unique word detector 10 must be constituted by high speed logic gates such as ECL's or the like, and has the problem that both power consumption and amount of generated heat are large. In addition, there is the further problem that the whole circuit scale is very large because the (N-1) number of adders 23.sub.a -23.sub.n-1 for performing the additions of the exclusive OR operations at every bit is also very large.
When LSI's are used to constitute the unique word detector 10 for the high bit rate system, the power consumption of the LSI's increases, resulting in the serious problem of a large heat generation. In addition, there is the problem that the conversion of the circuitry to an LSI constitution is difficult when a bit rate is higher than some value, unless parallel processing is performed and that the circuit scale is enlarged when the parallel processing is performed.